In inorganic semiconductors, doping generally refers to incorporating impurities into a semiconductor of an electronic device of an electric circuit. The amount of impurities is usually small compared to the concentration of the semiconductor. Impurities are defects in the semiconductor which are used to change the properties of the semiconducting host material, in particular the crystal structure or the electrical conductivity of the semiconductor. For organic semiconductors, where materials can be either amorphous or crystalline, doping may be achieved chemically by incorporating a material as part of the semiconductor film.
Controlled doping of a semiconductor has been exploited to improve and precisely tune transistor characteristics. A doped semiconductor forms an essential element of a metal-oxide-semiconductor field-effect transistor (MOSFET). Generally, the substrate of a MOSFET is made of doped silicon. Background prior art can be found in DE 20 2006 002 359 U1, DE 20 2005 009 260 U1, DE 20 2005 012 932 U1, DE 20 2005 009 955 U1, DE 20 2005 016 611 U1, DE 20 2005 019 360 U1 and U.S. Pat. No. 7,435,668.
A thin film transistor is a type of field-effect transistor with an isolated gate electrode. Thin film transistors are exploited, for example, in TFT-displays. A difference between a MOSFET and a thin film transistor is that the semiconducting active layer in a thin film transistor is generally prepared on top of an insulating substrate.
In order to switch on a thin film transistor, a gate voltage is applied to the gate electrode. This results in the generation of a charge accumulation layer in the semiconductor. The sign of the voltage to be applied to the gate electrode to switch the transistor on or off, respectively, is dependent on the type of semiconductor (n-type or p-type) exploited.
Contact resistance in devices such as thin film transistors is a parasitic effect that gives rise to a loss in a voltage drop across the active region of the device, thus leading to reduced output current levels. Consequently, the device mobility is compromised and does not achieve the mobility potential of the semiconductor material. Minimisation of the contact resistance, associated with charge carrier injection from a source (or drain) electrode into the semiconductor, is paramount for high mobility semiconductors at short channel length (10 μm and less). In order to achieve this, the surface of the conducting electrode may be treated prior to deposition of the semiconductor so as to shift the work function of the conducting electrode from its native value. In addition to the interfacial resistance at the electrodes, parasitic resistances associated with charge carrier transport in the bulk of the semiconductor film may also limit the potential for realising high device mobilities. Collectively, these two contributions of resistances are from now termed as parasitic contact resistances.